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@ -1,34 +1,7 @@
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#include <camera.hpp>
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#include <SCCB.hpp>
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#include <sccb.hpp>
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#include "pico/stdlib.h"
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#include "../../hardware_dma/include/hardware/dma.h"
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#include "hardware/pwm.h"
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#include "hardware/gpio.h"
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#include "hardware/irq.h"
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#include "hardware/pio.h"
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// TODO: Stolen from Adafruit repo (Check if correct)
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// PIO code in this table is modified at runtime so that PCLK is
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// configurable (rather than fixed GP## or PIN offset). Data pins
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// must be contiguous but are otherwise configurable.
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static uint16_t capture_pio_opcodes[] = {
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// Only monitor PCLK when HSYNC is high. This is more noise-immune
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// than letting it fly.
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0b0010000010000000, // WAIT 1 GPIO 0 (mask in HSYNC pin before use)
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0b0010000010000000, // WAIT 1 GPIO 0 (mask in PCLK pin before use)
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0b0100000000001000, // IN PINS 8 -- 8 bits into RX FIFO
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0b0010000000000000, // WAIT 0 GPIO 0 (mask in PCLK pin before use)
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};
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static struct pio_program cap_pio_program = {
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.instructions = capture_pio_opcodes,
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.length = sizeof capture_pio_opcodes / sizeof capture_pio_opcodes[0],
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.origin = -1,
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};
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register_val_t OV2640_init[] = {
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// Ideas from rp2040_ov2640-main repo
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// OV2640 camera initialization after reset
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@ -327,16 +300,7 @@ OV2640::OV2640(camera_config_t config) {
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int OV2640::begin() {
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// Initialize peripherals for parallel+I2C camera:
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// XCLK generation (~20.83 MHz)
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gpio_set_function(this->config.pin_xclk, GPIO_FUNC_PWM);
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uint slice_num = pwm_gpio_to_slice_num(this->config.pin_xclk);
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// 6 cycles (0 to 5), 125 MHz / 6 = ~20.83 MHz wrap rate
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pwm_set_wrap(slice_num, 5);
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pwm_set_gpio_level(this->config.pin_xclk, 3);
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pwm_set_enabled(slice_num, true);
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// Init SCCB
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//! TODO: start XCLK before SCCB init
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this->sccb = SCCB(this->config.pin_sccb_sda,this->config.pin_sccb_scl);
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this->sccb.begin(this->config.sccb_ctrl);
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@ -353,95 +317,7 @@ int OV2640::begin() {
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// Init main camera settings
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this->sccb.writeList(OV2640_init, sizeof OV2640_init / sizeof OV2640_init[0]);
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gpio_init(this->config.pin_pclk);
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gpio_set_dir(this->config.pin_pclk, GPIO_IN);
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gpio_init(this->config.pin_vsync);
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gpio_set_dir(this->config.pin_vsync, GPIO_IN);
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gpio_init(this->config.pin_href);
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gpio_set_dir(this->config.pin_href, GPIO_IN);
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for (uint8_t i = 0; i < 8; i++) {
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gpio_init(this->config.pin_data_base + i);
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gpio_set_dir(this->config.pin_data_base + i, GPIO_IN);
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}
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// PIO periph to use is currently specified by the user in the arch struct,
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// but I suppose this could be written to use whatever PIO has resources.
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// Mask the GPIO pin used PCLK into the PIO opcodes -- see notes at top
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// TODO: check if this is correct (code made for rp2040 not rp2350 so it might differ)
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capture_pio_opcodes[0] |= (this->config.pin_href & 31);
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capture_pio_opcodes[1] |= (this->config.pin_pclk & 31);
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capture_pio_opcodes[3] |= (this->config.pin_pclk & 31);
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uint offset = pio_add_program(pio2, &cap_pio_program);
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this->sm = pio_claim_unused_sm(pio2, true); // 0-3
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// host->pins->data[0] is data bit 0. PIO code requires all 8 data be
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// contiguous.
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pio_sm_set_consecutive_pindirs(pio2, this->sm, this->config.pin_data_base, 8, false);
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pio_sm_config c = pio_get_default_sm_config();
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c.pinctrl = 0; // SDK fails to set this
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sm_config_set_wrap(&c, offset, offset + cap_pio_program.length - 1);
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sm_config_set_in_pins(&c, this->config.pin_data_base);
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sm_config_set_in_shift(&c, false, true, 16); // 1 pixel (16b) ISR to FIFO
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sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_RX);
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pio_sm_init(pio2, this->sm, offset, &c);
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pio_sm_set_enabled(pio2, this->sm, true);
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// SET UP DMA ------------------------------------------------------------
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this->dma_channel = dma_claim_unused_channel(false); // don't panic
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this->dma_config = dma_channel_get_default_config(this->dma_channel);
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channel_config_set_transfer_data_size(&this->dma_config, DMA_SIZE_16);
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channel_config_set_read_increment(&this->dma_config, false);
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channel_config_set_write_increment(&this->dma_config, true);
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channel_config_set_bswap(&this->dma_config, true); // TODO: bswap should be true or false?
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// Set PIO RX as DMA trigger. Input shift register saturates at 16 bits
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// (1 pixel), configured in data size above and in PIO setup elsewhere.
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channel_config_set_dreq(&this->dma_config,
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pio_get_dreq(pio2, this->sm, false));
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// Set up baseline DMA configuration...it's initially lacking destination
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// and count, set later (dma_change()) after resolution is known. DMA
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// isn't started until later, and is triggered in the vsync interrupt.
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dma_channel_configure(this->dma_channel, &this->dma_config, NULL,
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&pio2->rxf[this->sm], 0, false);
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// Set up end-of-DMA interrupt
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dma_channel_set_irq0_enabled(this->dma_channel, true);
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// TODO: setup diffrent handlers for each cam???
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irq_set_exclusive_handler(DMA_IRQ_0, iCap_dma_finish_irq);
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irq_set_enabled(DMA_IRQ_0, true);
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// SET UP VSYNC INTERRUPT ------------------------------------------------
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gpio_set_irq_enabled_with_callback(this->config.pin_vsync, GPIO_IRQ_EDGE_RISE, true,
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&iCap_vsync_irq);
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return 0;
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}
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// TODO: figure out how to get from where does IRQs originate from
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// TODO: how to transfer data?
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// TODO: what?
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// TODO: eep time
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// TODO: make a static array with something like a hashmap containing GPIO -> sm+dma_channel mappings
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// Pin interrupt on VSYNC calls this to start DMA transfer (unless suspended).
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static void iCap_vsync_irq(uint gpio, uint32_t events) {
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pio_sm_clear_fifos(pio2, archptr->sm);
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dma_channel_start(archptr->dma_channel);
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}
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// TODO: make a static array with something like a hashmap containing GPIO -> sm+dma_channel mappings
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static void iCap_dma_finish_irq() {
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// Channel MUST be reconfigured each time (to reset the dest address).
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dma_channel_set_write_addr(archptr->dma_channel,
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(uint8_t *)(capptr->getBuffer()), false);
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dma_hw->ints0 = 1u << archptr->dma_channel; // Clear IRQ
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}
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// TODO: add all of the specific controls like brightness and all of that scheiße
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