wisnia/PicoIris
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Fix XCLK clock

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DMA debbuging
This commit is contained in:
KubaWis 2025-03-23 02:41:48 +01:00
parent 6766e3a2e6
commit c3d17ddf38
3 changed files with 50 additions and 28 deletions
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9
src/PicoIris.cpp
View File

@ -40,12 +40,11 @@ int main()
//left_cam.capture_frame();
//fwrite(left_cam.fb, 1, sizeof(left_cam.fb), stdout);
while (true) {
// //printf("Hello, world!\n");
// //sleep_ms(1000);
//printf("Hello, world!\n");
//sleep_ms(1000);
left_cam.capture_frame();
fwrite(&left_cam.fb, 1, sizeof(left_cam.fb), stdout);
// memset(&left_cam.fb, 0x00, sizeof(left_cam.fb));
//fwrite(&left_cam.fb, 1, sizeof(left_cam.fb), stdout);
memset(&left_cam.fb, 0x00, sizeof(left_cam.fb));
sleep_ms(1000);
}
}

3
src/ov2640/SCCB.cpp
View File

@ -81,7 +81,6 @@ void SCCB::writeRegister(uint8_t reg, uint8_t value)
}else {
//pio_i2c_write_blocking(this->pio, this->sm, OV2640_ADDR, buf, 2);
}
sleep_ms(30);
}
void SCCB::writeMaskRegister(uint8_t reg, uint8_t offset, uint8_t mask, uint8_t value)
@ -101,6 +100,6 @@ void SCCB::writeList(const register_val_t *cfg,
for (int i = 0; i < len; i++)
{
writeRegister(cfg[i].reg, cfg[i].value);
//sleep_ms(10); // Some cams require, else lockup on init
sleep_ms(2); // Some cams require, else lockup on init
}
}

66
src/ov2640/camera.cpp
View File

@ -16,6 +16,7 @@
static volatile bool frameReady = false; // true at end-of-frame
static volatile bool suspended = true;
void* pointer;
static void iCap_vsync_irq(uint gpio, uint32_t events) {
if (!suspended) {
@ -24,10 +25,13 @@ static void iCap_vsync_irq(uint gpio, uint32_t events) {
dma_channel_start(0);
}
}
static void iCap_dma_finish_irq() {
static void iCap_dma_finish_irq() {
frameReady = true;
suspended = true;
//printf("iCap_dma_finish_irq");
dma_channel_set_write_addr(0, (uint8_t *)(pointer), false);
printf("0x%\n", (uintptr_t)pointer);
dma_hw->ints0 = 1u << 0;
}
@ -568,7 +572,26 @@ register_val_t OV2640_rgb[] = {
{0xE1, 0x77}, // seen in other examples
{OV2640_REG0_RESET, 0x00}
}; // Go
register_val_t OV2640_qqvga[] = {
{OV2640_REG_RA_DLMT, OV2640_RA_DLMT_DSP}, // DSP bank select 0
{OV2640_REG0_RESET, OV2640_RESET_DVP},
{OV2640_REG0_HSIZE8, 0x64}, // HSIZE high bits
{OV2640_REG0_VSIZE8, 0x4B}, // VSIZE high bits
{OV2640_REG0_CTRL2, OV2640_CTRL2_DCW | OV2640_CTRL2_SDE |
OV2640_CTRL2_UV_AVG | OV2640_CTRL2_CMX},
{OV2640_REG0_CTRLI, OV2640_CTRLI_LP_DP | 0x12},
{OV2640_REG0_HSIZE, 0xC8}, // H_SIZE low bits
{OV2640_REG0_VSIZE, 0x96}, // V_SIZE low bits
{OV2640_REG0_XOFFL, 0x00}, // OFFSET_X low bits
{OV2640_REG0_YOFFL, 0x00}, // OFFSET_Y low bits
{OV2640_REG0_VHYX, 0x00}, // V/H/Y/X high bits
{OV2640_REG0_TEST, 0x00}, // ?
{OV2640_REG0_ZMOW, 0x28}, // OUTW low bits
{OV2640_REG0_ZMOH, 0x1E}, // OUTH low bits
{OV2640_REG0_ZMHH, 0x00}, // OUTW/H high bits
{OV2640_REG0_R_DVP_SP, 0x08}, // Manual DVP PCLK setting
{OV2640_REG0_RESET, 0x00}
};
// static const uint8_t special_effects_regs[7 + 1][5] = {
// {0x7C, 0x7D, 0x7C, 0x7D, 0x7D },
@ -581,10 +604,12 @@ register_val_t OV2640_rgb[] = {
// {0x00, 0X18, 0x05, 0X40, 0XA6 }, /* retro */
// };
OV2640::OV2640(camera_config_t config)
{
this->config = config;
memset(&this->fb, 0x00, sizeof(this->fb));
pointer = &this->fb;
//this->fb = image_buf;
}
@ -613,8 +638,8 @@ int OV2640::begin(int dma_irq)
gpio_set_function(this->config.pin_xclk, GPIO_FUNC_PWM);
uint slice_num = pwm_gpio_to_slice_num(this->config.pin_xclk);
// 8 cycles (0 to 7), 150 MHz / 8 = ~18.71 MHz wrap rate
pwm_set_wrap(slice_num, 5);
pwm_set_gpio_level(this->config.pin_xclk, 3);
pwm_set_wrap(slice_num, 7);
pwm_set_gpio_level(this->config.pin_xclk, 4);
pwm_set_enabled(slice_num, true);
// Init SCCB
@ -638,8 +663,9 @@ int OV2640::begin(int dma_irq)
//this->sccb.writeList(OV2640_stolem_jpeg_init, sizeof(OV2640_stolem_jpeg_init)/sizeof(OV2640_stolem_jpeg_init[0]));
//printf("Stolemjpg init DONE\n");
this->sccb.writeList(OV2640_init, sizeof(OV2640_init)/sizeof(OV2640_init[0]));
this->sccb.writeList(ov2640_uxga_cif, sizeof(ov2640_uxga_cif)/sizeof(ov2640_uxga_cif[0]));
this->sccb.writeList(OV2640_jpeg, sizeof(OV2640_jpeg)/sizeof(OV2640_jpeg[0]));
this->sccb.writeList(OV2640_qqvga, sizeof(OV2640_qqvga)/sizeof(OV2640_qqvga[0]));
this->sccb.writeList(OV2640_rgb, sizeof(OV2640_rgb)/sizeof(OV2640_rgb[0]));
//this->sccb.writeList(OV2640_jpeg, sizeof(OV2640_jpeg)/sizeof(OV2640_jpeg[0]));
//this->sccb.writeRegister(0xd3, 0x0f);
@ -655,18 +681,18 @@ int OV2640::begin(int dma_irq)
//sleep_ms(10);
//this->set_lenc(true);
//sleep_ms(10);
this->set_quality(5);
sleep_ms(10);
this->sccb.writeList(OV2640_jpeg, sizeof(OV2640_jpeg)/sizeof(OV2640_jpeg[0]));
this->set_quality(5);
//prtintf("Write list of init\n");
// this->set_quality(5);
// sleep_ms(10);
// this->sccb.writeRegister(OV2640_REG_RA_DLMT, OV2640_RA_DLMT_DSP);
sleep_ms(10);
//this->sccb.writeRegister(0xd3, 0x05);
sleep_ms(10);
// this->sccb.writeList(OV2640_jpeg, sizeof(OV2640_jpeg)/sizeof(OV2640_jpeg[0]));
// this->set_quality(5);
// //prtintf("Write list of init\n");
// // sleep_ms(10);
// // this->sccb.writeRegister(OV2640_REG_RA_DLMT, OV2640_RA_DLMT_DSP);
// sleep_ms(10);
// //this->sccb.writeRegister(0xd3, 0x05);
// sleep_ms(10);
// // for (int i=0; i<5; i++) {
@ -674,8 +700,8 @@ int OV2640::begin(int dma_irq)
// // this->sccb.writeRegister(special_effects_regs[0][i], special_effects_regs[3][i]);
// // }
this->sccb.writeRegister(0xff, 0x00);
this->sccb.writeRegister(0xd3, 0x05); // try 0x80 next
// this->sccb.writeRegister(0xff, 0x00);
// this->sccb.writeRegister(0xd3, 0x05); // try 0x80 next
//prtintf("Gpio init\n");
@ -854,8 +880,6 @@ void OV2640::set_lenc(bool enable) {
void OV2640::capture_frame() {
suspended = false;
while(!frameReady);
return;